Microprocessor integrated circuit (IC) packages and memory IC packages (ICs being also referred to as “chips”) are often arranged in a stacked configuration using solder ball grid array (BGA) connections between the processor and memory chip packages in order to save horizontal space on a printed circuit board (PCB). These stack ups are referred to as PoP (Package-on-Package) configurations. FIG. 1 illustrates one example of a known chip package stack up 100. The stack up 100 extends upwardly in the z-axis direction away from a main PCB 101 surface as indicated by the +Z arrow direction. A first BGA 103 connects the processor chip package 105 to the main PCB 101 and a second BGA 107 connects the memory chip package 109 to the processor chip package 105. A shield fence 113 surrounds the chip stack up to provide electromagnetic shielding.
A copper conductor 111 such as a copper tape, is positioned above the shield fence 113, as the shield fence cover, such that it comes in contact with the upper surface of the memory chip package 109 and provides a thermal pathway away from the memory chip package 109 surface. The copper conductor 111 may be a copper tape. A heat spreader 115, such as a graphite sheet, is in contact with the copper conductor 111 such that heat from the memory chip package 109 is dissipated through the copper conductor 111 and upward through the heat spreader 115, the top surface of which provides a heat dissipation surface area. Although the copper conductor 111 and heat spreader 115 are shown being substantially horizontal, both the copper conductor 111 and heat spreader 115 are flexible and may slope downwardly as needed in order to come into contact with the upper surface of the memory chip package 109.
The challenge for a stack up such as example stack up 100 is that the processor chip package 105 (which may include multiple processor chips within the chip package) generates the greater amount of heat versus the memory chip package 109. In the example stack up 100, the heat generated by the processor chip package 105 can only flow downward through the BGA 103 to the PCB 101, or can flow upward through the memory chip package 109 to the copper conductor 111 and the heat spreader 115. Neither of these thermal pathways is efficient for heat dissipation from the processor chip package 105 because the PCB 101 is not particularly thermally conductive, and the number of BGA connections between the memory chip package 109 and the processor chip package 105 is only a fraction of the BGA connections between the processor chip package 105 and the PCB 101 which further limits the amount of thermal conduction that can occur in the upward direction. Additionally, stagnant air between the processor chip package 105 and the memory chip package 109 becomes heated thereby creating an environment that heats up the memory chip package 109 which is very undesirable for memory chip performance among other considerations.